1. Field of the Invention
The present invention relates generally to the data processing field, and more particularly, to communication between a host computer and an input/output (I/O) adapter through an I/O fabric, wherein the I/O fabric is attached to more than one root node and wherein each root can potentially share the I/O adapter with the other roots. Especially the invention pertains to a method for creating and managing the structures needed for routing PCI transaction packets between multiple hosts and adapters, through a PCI switched-fabric bus when using a destination identifier.
2. Description of the Related Art
PCI (Peripheral Component Interconnect) Express is widely used in computer systems to interconnect host units to adapters or other components, by means of a PCI switched-fabric bus or the like. However, currently, PCI Express does not permit sharing of PCI adapters in topologies where there are Multiple Hosts with Multiple Shared PCI busses. Support for this type of function can be very valuable on blade clusters and on other clustered servers. Currently, PCI Express and secondary network (e.g. FC, IB, Enet) adapters are integrated into blades and server systems, and cannot be shared between clustered blades or even between multiple roots within a clustered system. For blade environments, it can be very costly to dedicate these network adapters to each blade. For example, the current cost of a 10 Gigabit Ethernet adapter is in the $6000 range. The inability to share these expensive adapters between blades has contributed to the slow adoption rate of some new network technologies (e.g. 10 Gigabit Ethernet). In addition, there is a constraint in space available in blades for PCI adapters. A PCI network that is able to support attachment of multiple hosts and to share Virtual PCI IOAs among the multiple hosts would overcome these deficiencies in current systems.
In order to allow virtualization of PCI secondary adapters in this environment, a mechanism is needed to route MMIO (Memory-Mapped Input/Output) packets from a host to a target adapter, and to route DMA (Direct Memory Access) packets from an adapter to the appropriate host in such a way that the System Image's memory and data is prevented from being accessed by unauthorized applications in other System Images, and from other adapters in the same PCI tree. It is also desirable that such a mechanism be implemented with minimum changes to current PCI hardware.
Commonly assigned, copending U.S. patent application entitled ROUTING MECHANISM IN PCI MULTI-HOST TOPOLOGIES USING DESTINATION ID FIELD, Ser. No. 11/260,621, filed on Oct. 27, 2005 the disclosure of which is hereby incorporated by reference, describes a routing mechanism for a distributed computing system, such as a system that uses PCI-Express protocol to communicate over an I/O fabric. The routing mechanism includes a destination identifier to identify a physical or virtual end point. When a physical or virtual end point or host receives a transaction packet it compares a list of source identifiers with destination identifiers using a Destination ID Validation Table (DIDVT) to determine if a source identifier included in the transaction packet is associated with the destination identifier. Only if the transaction packet has a valid association, is it routed to a target device.
Modifications are frequently made to a distributed computing system that affects the routing of data through the system. For example, IOAs in the system may be transferred from one host to another, or hosts and/or IOAs may be added to or removed from the system. In order to ensure that the routing mechanism described in the above-identified patent application functions as intended in such an environment, a mechanism is needed to manage the routing of data by the routing mechanism to reflect such modifications to the system.
It would, accordingly, be desirable to provide a method and system for managing the routing of data by a routing mechanism in a distributed computing system, for example, a distributed computing system that uses PCI Express protocol to communicate over an I/O fabric, to reflect modifications made to the distributed computing system.